1. Field of the Invention
This invention relates to circuit simulation techniques. More particularly, it relates to an acceleration of the simulation of a circuit including a crystal.
2. Background of Related Art
Circuit simulation techniques are invaluable for integrated circuit manufacturers. These techniques simulate the transient, ac and/or dc electrical characteristics of a given circuit operating under given conditions even before the integrated circuit is actually manufactured. Integrated circuit designs continue the trend of becoming more densely populated with components, each of which may affect the electrical characteristics of other components, and each of which adds to the complication of the simulation and requires additional computational time.
Accuracy in the modeling of electrical components used in the simulated circuit and their respective electrical properties is very important to the achievement of useful results, but higher accuracy requires more complicated calculations and additional computer time. For instance, some of the properties of a crystal which are important in modeling a circuit driving the crystal include the parallel capacitance, series resistance, and frequency of the crystal. A conventional simulation model of a quartz crystal is shown in FIG. 5.
FIG. 5 shows a conventional crystal model 120 connected through a series resistor 112 to a processor 102. Capacitors 114, 116 couple the input and output nodes of crystal model 120 to ground.
The crystal circuit is modeled in a computer application simulation program such as SPICE, with inherent characteristics of some components being approximated by imaginary passive components. For instance, the capacitance of the quartz crystal in FIG. 5 is modeled with a series capacitance capacitor 104 connected between the input and output nodes of the crystal model 120. The series resonant frequency of the crystal is modeled as a capacitor 106 in series with an inductor 110. The parallel resonant frequency of the crystal is modeled as capacitor 106 and inductor 110 in parallel with the series capacitance capacitor 104. Resistor 108 models the series resistance of the physical crystal. Ideally, capacitor 106 and inductor 110 cancel each other out at the series resonant frequency of the physical crystal. Circuit designers tend to limit the number of passive components used to model a circuit to reduce the complexity of the simulation.
Mathematical simulation of the crystal circuit shown in FIG. 5 operating at a relatively high frequency, e.g., 25 to 100 MHz, requires calculation of selected output nodes on a relatively small time scale, e.g., every 1 simulated nanosecond, over an extended period of simulated time.
FIG. 6 shows a conventional input buffer of a processor such as the digital signal processor (DSP) Model DSP1640 commercially available from LUCENT TECHNOLOGIES. For accuracy the simulation includes components representing the internal crystal oscillator input buffer circuit, e.g., as shown in FIG. 6, as well as the external components as shown in FIG. 5.
The particular processor 102 used in the exemplary embodiment, the DSP1640, includes a mode wherein the oscillator is halted by the removal of an enable signal to enable line 244. When the enable signal on enable line 244 is logic HIGH, the input buffer of the processor 102 is enabled, and when the enable signal on enable line 244 is logic LOW, the input buffer of the processor 102 is disabled. Hence, when a logic HIGH signal is present on enable line 244, inverter circuit 200, 202 provides a low signal to PMOS FET 204, turning FET 204 on. This provides the power supply voltage, e.g., VDD, across the series-connected driver FETs 206, 208 to allow the input buffer to drive the modeled crystal.
External oscillator input line 240 provides a gate voltage to FETs 206, 208, and external oscillator output line 242 outputs the signal from between the drain of FET 206 and the source of FET 208. Serially-connected FETs 210, 212 are continuously driven on by V.sub.DD applied to their gates, and provide a feedback path for the inverting amplifier 250 from the output of the crystal model 120 to the input line 240. When enabled, the simulated internal crystal oscillator circuit shown in FIG. 6 drives an externally-connected physical crystal and causes an approximately sinusoidal voltage output across the input and output nodes of the crystal model 120 shown in FIG. 5.
FIG. 7 shows a graph of the voltage between the input and output nodes of the crystal model 120 every 1 simulated nanosecond, for 40,000,000 simulated nanoseconds (40 simulated microseconds). FIG. 7A is an exploded and exaggerated view of the portion VIIA in FIG. 7 showing that the signal is actually oscillating within the signal envelope 130. A steady state of the peak amplitude of the oscillation of the crystal is not achieved by the mathematical simulation shown in FIGS. 6 and 7 until after about 40,000,000 simulated nanoseconds. Thus, FIG. 7 represents the conventional requirement to calculate and plot 40,000,000 individual values before the simulation reaches a steady state.
Each of these 40,000,000 calculations requires a finite amount of real time, and conventional computers require as long as 20 hours to calculate and plot the output shown in FIG. 7 based on the circuit in FIG. 6. The output of the simulation is not an accurate representation of the modeled circuit until the steady state is reached. Thus, because of the slower achievement of a steady state output using conventional simulation techniques, the manufacture of an integrated circuit including a crystal results in slower product design and longer manufacturing cycles.